ASIC Component Engineer- 1205710

  • Location:
    San Jose, California, US
  • Area of Interest
    Engineer - Hardware
  • Job Type
  • Technology Interest
  • Job Id

What You'll Do
As an ASIC Component Engineer, you will be a  member of the CQT Strategic Semiconductor Component Engineering team and will own specific Component Engineering (CE) responsibilities including development, qualification and sustaining of strategic semiconductor devices.  You will become a Cisco technical expert for commodity semiconductor and ASIC components.  You will be the interface to Cisco Business Units (BU), product development engineering teams and other Supply Chain organizations.

You will be in the critical path for approving the use of semiconductor devices in Cisco and will own the device from conception thru NPI to EOL. As a Cisco ASIC component engineer your tactical duties will bring together internal design/test/DFT teams with strategic supply chain partners to develop, qualify/risk assess/mitigate reliability issues and launch ASIC’s into next generation Cisco products. Strategically, you will engage with industry leading partners and internal technical subject matter experts in silicon technology, packaging and test/DFT to enable the next generation technology needed for sustained competitive differentiation. 

Cisco is a great place to learn and share your expertise.  You will be asked to contribute in a very collaborative workplace – to demonstrate your leadership by influencing decisions and actively looking to transform, improve and evolve processes.   This is a truly a unique opportunity to join Cisco’s global team of experts working on enabling the next generation of networking solutions.

Who You'll Work With
You will work with a team of component engineering  experts with experience in component qualification and reliability testing of strategic semiconductor devices ranging from ASIC's to MPU.

Who You Are
• You have 10+ years of semiconductor component qualification and reliability testing experience with a fundamental understanding of silicon fabrication processes, semiconductor (IC) design methodologies and component testing /characterization.
• You actively engage with internal and external stakeholders/partners to manage the bring-up of semiconductor devices from qualification through characterization.
• You have demonstrated leadership skills in driving transformative initiatives within your organization to continuously evolve and deliver process efficiency.
• Bachelor's Degree in Electrical Engineering (BSEE) with 10+ years of relevant hands-on experience with semiconductor component quality and reliability testing is required; Masters In Electrical Engineering (MSEE) is preferred.
• Detailed understanding of semiconductor reliability testing methodologies, relevant industry standards (JEDEC), risk factors and how to analyze for them, troubleshooting and failure analysis (FA) of complex semiconductor failure modes, root cause and reliability risk assessment.
• Fundamental understanding of semiconductor fabrication processes, device physics, chip design architecture, DFR/DFM methodology.
• Familiarity with Semiconductor Suppliers and Semiconductor foundries: Commodity spaces, roadmaps, qualifications, process changes, industry and market drivers, etc.
• Strong teamwork & collaboration skills: Must be able to interface and drive deliverables in a highly cross-functional environment, across supply chain partners and multiple layers of management.
• Excellent problem solving & effective conflict resolution skills: Must be able to quickly resolve quality and reliability issues and deliver a justifiable consensus opinion on risk level.

• Masters In Electrical Engineering (MSEE) is preferred.
• Hands-on experience with semiconductor component reliability testing (i.e. HTOL, ESD, Latch-up, etc…), and tooling bring-up for testing.
• Strong understanding of reliability risk factors for 2.5D/TSV/3D semiconductor devices with HBM.
• Hands on wafer fab experience, process development, troubleshooting, FA and DFM/DFR methodology
• Hands on device characterization with test/DFT influence to ensure right level of risk mitigation through guard-banding and test coverage.

Why Cisco
We connect everything: people, processes, data, and things. We innovate everywhere, taking bold risks to shape the technologies that give us smart cities, connected cars, and handheld hospitals. And we do it in style with unique personalities who aren’t afraid to change the way the world works, lives, plays and learns.

We are thought leaders, tech geeks, pop culture aficionados, and we even have a few purple haired rock stars. We celebrate the creativity and diversity that fuels our innovation. We are dreamers and we are doers.

We Are Cisco.

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