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Physical Design Engineer (Austin, TX)

Qualcomm Inc.


Location:
Austin, TX
Date:
04/24/2018
2018-04-242018-05-23
Job Code:
1963715
Qualcomm Inc.
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Job Details

Job Title Physical Design Engineer (Austin, TX)
Jobid 1963715
Location: Austin, TX, 78769, USA
Job Description:
**Job Id**
E1963715
Job Title
Physical Design Engineer (Austin, TX)
Post Date
04/20/2018
Company
-
Division
Qualcomm Technologies, Inc.
-
CDMA Technology at http://www.qualcomm.com/about/businesses/qct
Job Area
Engineering - Hardware
Location
Texas - Austin
Job Overview
Working in one or more of the following areas related to Qualcomms DSP core implementation that are used for leading edge products, oversees definition, design, verification, and documentation for ASIC development for a variety of products. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Evaluates all aspects of the process flow from high-level design to synthesis, place and route, and timing and power use. Analyzes equipment to establish operation data, conducts experimental tests, and evaluates results. Uses System tools, such as National Instrument (NI) products, LabVIEW, and MathWorks MATLAB, SIMULINK, VISIO and other toolboxes. Uses language such as HDL, C, PERL. Provides technical expertise for next generation initiatives.


Responsibilities:


Include various aspects of physical design and implementation of DSP. Following describe some that include but not limited to :


- Floorplanning (hierarchical and bottom-up), power grid implementation and analysis to meet signoff requirements


- Qualify timing constraints and synthesis netlist through trials while working closely with Logic design team


- Perform placement, clock tree synthesis and routing followed by STA towards full core implementation and handoffs to top-level chip teams


- Lead the core level timing ECOs and various electrical checks (SigEM, C2I, ERC) followed by DRC and LVS closure


- Drive the development of semi-custom design techniques where appropriate to maximize utilization, performance, and power efficiency


- Use and extend/enhance design methodologies to achieve the best PPA through scripting


- Working independently with little supervision.


- Making decisions that are moderate in impact; errors may have financial impact or effect on projects, operations, or customer relationships; errors may require involvement beyond immediate work group to correct.


- Using verbal and written communication skills to convey complex and/or detailed information to multiple individuals/audiences with differing knowledge levels. May require strong negotiation and influence, communication to large groups or high-level constituents.


- Having a moderate amount of influence over key organizational decisions (e.g., is consulted by senior leadership to provide input on key decisions).


- Completing tasks that do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach; mistakes may result in significant rework.


- Exercising substantial creativity to innovate new processes, procedures, or work products within guidelines or to achieve established objectives.


- Using deductive and inductive problem solving; multiple approaches may be taken/necessary to solve the problem; often information is missing or conflicting; advanced data analysis and interpretation skills are required.


- Occasionally participates in strategic planning within own area affecting immediate operations.


PRINCIPAL DUTIES AND RESPONSIBILITIES:


Uses tools/applications (i.e., Cadence, RTL Compiler, etc.) to execute advanced architecture and design of multiple complex blocks and makes suggestions for design protocol.


Develops an implementation strategy that meets system requirements and customer needs for team.


Effectively utilizes advanced problem solving and ASIC engineering practices to resolve complex architecture, design, or verification problems.


Owns the design and verification strategies of ASICs, SoC, and IP cores, reviews the strategies of more junior team members and develops strategies for multiple blocks or IC Packages.


Reviews complex tests from more junior team members and completes own tests to ensure that bugs are fully understood and analyzed.


Runs advanced power checks on multiple blocks to ensure design specifications are met; makes recommendations to leadership when specifications are not met.


Interprets the results o
All Qualcomm employees are expected to actively support diversity on their teams, and in the Company.
Minimum Qualifications
Bachelor's degree in Science, Engineering, or related field.

5+ years ASIC design, verification, or related work experience.
Preferred Qualifications
Bachelor's degree in Electrical Engineering, Computer Science, or Computer Engineering.


8+ years ASIC design, verification, or related work experience.


2+ years experience with architecture and design tools.


2+ years experience with scripting tools and programming languages.


2+ years experience with design verification methods.


1+ years of work experience in a role requiring interaction with senior leadership (e.g., Director level and above).
Education Requirements
Bachelor's degree in Science, Engineering, or related field.
EEO employer: including race, gender, gender identity, sexual orientation, disability & veterans status.


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