Senior ASIC Verification Engineer

  • Location:
    San Jose, California, US
  • Area of Interest
    Engineer - Software
  • Job Type
  • Technology Interest
    Internet of Everything, Networking
  • Job Id


  • Participate in architecture definition and modeling.
  • Contribute to micro-architecture specification and reviews.
  • Engage in verification environment architecture and methodology development.
  • Drive chip level testplan development and execution.
  • Engage in post-silicon bringup and validation.
  • Foster cross functional collaboration with design, software and hardware teams to ensure a successful product delivery.
  • Mentor and enable other engineers. 

Skills Required:  

  • Experience in high-performance ASIC verification.
  • Good understanding of ASIC design and verification methodologies and flows.
  • Hands-on experience with HVL and HDL languages and tools, scripting and programming languages (Verilog, SV, C++, Perl, etc.).
  • Proficient in object oriented programming.
  • Good understanding of random stimulus generation methodology.
  • UVM knowledge a plus.
  • Good problem solving skills.
  • Good communication skills and a team player.
  • Networking knowledge preferred, but not essential.

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