Senior Hardware Engineer - Signal Integrity

  • Location:
    San Jose, California, US
  • Area of Interest
    Engineer - Hardware
  • Job Type
    Professional
  • Technology Interest
    Cloud and Data Center
  • Job Id
    1217888
New


What You'll Do

You will provide the technical analysis, modeling, and simulation to the board design to ensure that the system meets the signal integrity and power integrity requirements. Provide detailed design guidelines related to high-speed signals, reference clocks, power decoupling, etc. Provide solution to any Signal/Power Integrity related issue. Validate and optimize the design through lab measurements and performance testing. Coordinate on performance and compliance testing such as Signal/Power Integrity Validation Testing, EMI Testing, Electrical Design Validation Testing, and Optical Design Validation Testing.

Who You'll Work With

You will work with a disruptive hardware team to design high-speed and high-density data center switch that features application awareness to make the network infrastructure flexible and agile for dynamic response to application needs and virtual machine workload mobility.

Who You Are

You are a senior hardware engineer with deep knowledge in transmission line theory, chip and board design, high-speed interfaces, timing analysis, power delivery network, and reference clocks.

Hands-On lab experience on high-speed interface validation including chip-to-chip, chip-to-module, backplane.

Experience and working knowledge of field solvers and simulation tools such as HFSS, HSpice, ADS, PowerSI, PowerDC, Quantum Channel Designer.

Experience on high-speed design such as 400GE, 100GE, PCIE, SFP+/QSFP+, DDR memory, High-Speed High-Density Connectors.

Deep knowledge in transmission line theory, chip and board design, high-speed Serdes, timing analysis, power deliver, reference clocks

BSEE with 7-year relevant industry experience or MSEE with 5-year relevant industry experience.

Desired Skills

● Experience on Printed Circuit Board (PCB) design or chip package design

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