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Wifi IP Synthesis Engineer

Qualcomm Inc.


Location:
Chennai
Date:
05/18/2018
2018-05-182018-06-16
Job Code:
1960647
Qualcomm Inc.
Apply on the Company Site
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Job Details

Job Title Wifi IP Synthesis Engineer
Jobid 1960647
Location: Chennai, IND
Job Description:
**Job Id**
E1960647
Job Title
Wifi IP Synthesis Engineer
Post Date
04/18/2018
Company
-
Division
Qualcomm Technologies, Inc.
-
CDMA Technology at http://www.qualcomm.com/about/businesses/qct
Job Area
Engineering - Hardware
Location
India - Chennai
Job Overview
Candidate will be responsible for synthesis, timing closure and logic equivalence checks of next Generation WLAN cores for enterprise, mobile and adjacent market applications. This role will require the candidate to understand and work on synthesis , pre-layout timing closure ,formal verification and low power verification. Candidate will be working on synthesis of various next generation wireless LAN sub blocks , modifying timing constraints and low power verification flows . This candidate will work closely with front end design and physical design teams to close timing in sub-micro technologies (from 40nm to 7nm). Candidate will help on automation of various implementation tasks including synthesis, formal verification and pre-layout timing analysis .
Minimum Qualifications
Must hold a Bachelors and/or a Masters in Electrical Engineering with at least 1 to 9 years experience in SOC logic synthesis and timing constraints.

Good knowledge in ASIC flow , digital design

Good knowledge synthesis , cmos technologies, static timing analysis concepts

Good understanding of timing constraints development

Good understanding of low power design and simulations using ptpx/power artist/conformal low power

Good understanding logic equivalence using industry standard tools like conformal

Should have good analytical ability, problem solving skills and be a self-starter

Candidate should be able work in a team environment

Strong scripting skills using tcl/perl languages

Good understanding of system verilog/verilog

Good understanding of dft methodologies and MBIST flows
Preferred Qualifications
Knowledge of Conformal ECO a plus
Education Requirements
Bachelors and/or a Masters in Electrical Engineering
EEO employer: including race, gender, gender identity, sexual orientation, disability & veterans status.


Apply on the Company Site
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