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Wireless HW Power Lead

Qualcomm Inc.


Location:
Bangalore
Date:
04/20/2018
2018-04-202018-05-19
Job Code:
1963093
Qualcomm Inc.
Apply on the Company Site
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Job Details

Job Title Wireless HW Power Lead
Jobid 1963093
Location: Bangalore, IND
Job Description:
**Job Id**
E1963093


Job Title
Wireless HW Power Lead


Post Date
03/08/2018


Company
-
Division
Qualcomm Technologies, Inc.
-
CDMA Technology at http://www.qualcomm.com/about/businesses/qct

Job Area
Engineering - Hardware

Location
India - Bangalore

Job Overview
- Lead a team working on power analysis and optimization for 4G/5G WAN and 802.11 ac / ax WLAN cores


- Manage extensive RTL and Netlist power analysis activities using Power Artist / Power Pro / PTPX


- Interface with PD, SoC, Chipset and Systems teams to provide usecase power rollup for various scenarios for eg, 3G voice, 4G / 5G voice/data, idle, DTIM, PDCCH, etc


- Define system level power optimization solutions, provide power targets to design teams, and commit product power to meet business goals


- Work closely with PD, PDN and Thermal teams to provide appropriate peak power vectors for IR/Ldidt and Thermal considerations


- Understand impact of microarchitecture and process node changes and project power impact at a very early stage


- Manage power projections, correlation from Design review ->Netlist, RTL ->GLS, Pre-Si ->Post-Si


- Work closely with stakeholders to optimize datapath for low-power using techniques in RTL, Synthesis and PD


- Contribute to implementation activities including synthesis, formal verification, CLP and timing analysis


Minimum Qualifications
- 8-12 years experience in Digital ASIC / Processor Design with a leading chipset company

- Strong fundamentals in : Microarchitecture, Computer Arithmetic, Circuit Design, Process Technology

- Strong Experience required in : Design / Implementation for Low-Power, UPF design intent, Multi-voltage domains, Power gating, Power sequencing, PTPX, Power Artist / Power Pro, RTL VCD vs GLS annotation and correlation, SDF annotation, Peak power analysis for PDN and Thermal, PTPX vs Si correlation

- Experience in post Silicon Power/in-rush related debugs.

Preferred Qualifications
- Strong Experience preferred in one or more among: Verilog RTL, Synthesis, PTPX, Formal Verification, Static Timing, CLP, Physical Design, Stdcell Libraries


- Familiarity with one of the following is a plus, but not required : Digital Signal Processing, Digital Communications, Information Theory


- Strong communication skills to work with design teams worldwide


Education Requirements
Required: Bachelor's, Electrical Engineering

Preferred: Master's, Electrical Engineering

EEO employer: including race, gender, gender identity, sexual orientation, disability & veterans status.


Apply on the Company Site
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